Invention Grant
- Patent Title: Bit error generation system for optical networks
- Patent Title (中): 光网络的位错产生系统
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Application No.: US13933199Application Date: 2013-07-02
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Publication No.: US08873949B2Publication Date: 2014-10-28
- Inventor: Scott R. Kotrla , Matthew W. Turlington , Michael U. Bencheck , Tiejun J. Xia
- Applicant: Verizon Patent and Licensing Inc.
- Applicant Address: US NJ Basking Ridge
- Assignee: Verizon Patent and Licensing Inc.
- Current Assignee: Verizon Patent and Licensing Inc.
- Current Assignee Address: US NJ Basking Ridge
- Main IPC: H04B10/00
- IPC: H04B10/00
Abstract:
A bit error generating device includes a light source, an input device, and a control processor. The control processor includes logic configured to: receive protocol or bitrate information regarding a live traffic signal via the input device; determine bit error simulation signal parameters based on the received protocol or bitrate information; configure the light source to generate the bit error simulation signal based on the bit error simulation signal parameters; and instruct the light source to inject the bit error simulation signal into an optical fiber carrying the live traffic signal.
Public/Granted literature
- US20130294769A1 BIT ERROR GENERATION SYSTEM FOR OPTICAL NETWORKS Public/Granted day:2013-11-07
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