发明授权
US08895379B2 Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same
有权
集成电路具有具有降低的硅化物接触电阻的升高的源极漏极器件和用于制造它们的方法
- 专利标题: Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same
- 专利标题(中): 集成电路具有具有降低的硅化物接触电阻的升高的源极漏极器件和用于制造它们的方法
-
申请号: US13344806申请日: 2012-01-06
-
公开(公告)号: US08895379B2公开(公告)日: 2014-11-25
- 发明人: Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Pranita Kulkarni , Christian Lavoie
- 申请人: Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Pranita Kulkarni , Christian Lavoie
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Harrington & Smith
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A structure has at least one field effect transistor having a gate stack disposed between raised source drain structures that are adjacent to the gate stack. The gate stack and raised source drain structures are disposed on a surface of a semiconductor material. The structure further includes a layer of field dielectric overlying the gate stack and raised source drain structures and first contact metal and second contact metal extending through the layer of field dielectric. The first contact metal terminates in a first trench formed through a top surface of a first raised source drain structure, and the second contact metal terminates in a second trench formed through a top surface of a second raised source drain structure. Each trench has silicide formed on sidewalls and a bottom surface of at least a portion of the trench. Methods to fabricate the structure are also disclosed.
公开/授权文献
信息查询
IPC分类: