An electronic device may have a camera module and a host subsystem. The camera module may include a camera sensor and associated image processing and data formatting circuitry. The image processing and data formatting circuitry may include an image processor that produces unscaled images frames using data from the camera sensor. Unscaled image frames may be processed in multiple paths between the image processor and the host subsystem such as a path that includes an image compression circuit block, a parallel path that includes a preview scaler, and a parallel path that includes a multiframe scaler and a frame buffer and multiframe image processor circuitry. The multiframe scaler may scale unscaled frames for buffering and processing by the frame buffer and multiframe image processor circuitry to produce analysis results. The analysis results may be appended to compressed unscaled image frames sent to the host subsystem.