Invention Grant
- Patent Title: Semiconductor package, packaging substrate and fabrication method thereof
- Patent Title (中): 半导体封装,封装基板及其制造方法
-
Application No.: US13490810Application Date: 2012-06-07
-
Publication No.: US08901729B2Publication Date: 2014-12-02
- Inventor: Chia-Yin Chen , Yu-Ching Liu , Yueh-Chiung Chang , Yu-Po Wang
- Applicant: Chia-Yin Chen , Yu-Ching Liu , Yueh-Chiung Chang , Yu-Po Wang
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Edwards Wildman Palmer LLP
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW100147660A 20111221
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.
Public/Granted literature
- US20130161837A1 SEMICONDUCTOR PACKAGE, PACKAGING SUBSTRATE AND FABRICATION METHOD THEREOF Public/Granted day:2013-06-27
Information query
IPC分类: