Invention Grant
- Patent Title: Semiconductor structure and method for manufacturing the same
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Application No.: US13380857Application Date: 2011-08-25
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Publication No.: US08906753B2Publication Date: 2014-12-09
- Inventor: Haizhou Yin , Huilong Zhu , Zhijiong Luo
- Applicant: Haizhou Yin , Huilong Zhu , Zhijiong Luo
- Applicant Address: CN Beijing
- Assignee: The Institute of Microelectronics Chinese Academy of Science
- Current Assignee: The Institute of Microelectronics Chinese Academy of Science
- Current Assignee Address: CN Beijing
- Agency: Treasure IP Group, LLC
- Priority: CN201110175568 20110627
- International Application: PCT/CN2011/078877 WO 20110825
- International Announcement: WO2013/000196 WO 20130301
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/417 ; H01L29/66 ; H01L29/423 ; H01L29/78

Abstract:
The present invention provides a method for manufacturing a semiconductor structure, which comprises: providing an SOI substrate, forming a gate structure on the SOI substrate; etching an SOI layer of the SOI substrate and a BOX layer of the SOI substrate on both sides of the gate structure to form trenches, the trenches exposing the BOX layer and extending partly into the BOX layer; forming sidewall spacers on sidewalls of the trenches; forming inside the trenches a metal layer covering the sidewall spacers, wherein the metal layer is in contact with the SOI layer which is under the gate structure. Accordingly, the present invention further provides a semiconductor structure formed according to aforesaid method. The manufacturing method and the semiconductor structure according to the present invention make it possible to reduce capacitance between a metal layer and a body silicon layer of an SOI substrate when a semiconductor device is in operation, which is therefore favorable for enhancing performance of the semiconductor device.
Public/Granted literature
- US20140124859A1 Semiconductor structure and method for manufacturing the same Public/Granted day:2014-05-08
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