Invention Grant
- Patent Title: Through via structure including a conductive portion and aligned solder portion
- Patent Title (中): 通孔结构包括导电部分和对准的焊接部分
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Application No.: US14291749Application Date: 2014-05-30
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Publication No.: US08928123B2Publication Date: 2015-01-06
- Inventor: Gian Pietro Vanalli , Giovanni Campardo , Aldo Losavio , Paolo Pulici , Pier Paolo Stoppino
- Applicant: STMicroelectronics S.r.l. , Politecnico di Milano
- Applicant Address: IT Agrate Brianza (MB) IT Milan
- Assignee: STMicroelectronics S.r.l.,Politecnico di Milano
- Current Assignee: STMicroelectronics S.r.l.,Politecnico di Milano
- Current Assignee Address: IT Agrate Brianza (MB) IT Milan
- Agency: GardereWynne Sewell LLP
- Priority: ITM12008A1505 20080808
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L23/00 ; H01L23/498
Abstract:
A substrate has a first surface and a second surface opposed to each other. A blind hole is formed in the substrate extending from the first surface at a location for each through via. Each blind hole is filled with a conductive filler; a deepest part of each filler forming a bump portion made of a solder material. Part of the substrate extending from the second surface is removed to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding solder bump.
Public/Granted literature
- US20140264852A1 METHOD FOR FORMING BUMPS IN SUBSTRATES WITH THROUGH VIAS Public/Granted day:2014-09-18
Information query
IPC分类:
