Invention Grant
US08930638B2 Method and apparatus for supporting target-side security in a cache coherent system 有权
用于在高速缓存一致系统中支持目标侧安全性的方法和装置

Method and apparatus for supporting target-side security in a cache coherent system
Abstract:
A cache coherency controller, a system comprising such, and a method of its operation are disclosed. The coherency controller ensures that target-side security checking rules are not violated by the performance-improving processes commonly used in coherency controllers such as dropping, merging, invalidating, forwarding, and snooping. This is done by ensuring that requests marked for target-side security checking and any other requests to overlapping addresses are forwarded directly to the target-side security filter without modification or side effects.
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