Invention Grant
- Patent Title: Binary adder and multiplier circuit
- Patent Title (中): 二进制加法器和乘法器电路
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Application No.: US14077198Application Date: 2013-11-11
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Publication No.: US08933731B2Publication Date: 2015-01-13
- Inventor: Rohit Goyal , Amit Kumar Dey , Naman Gupta
- Applicant: Rohit Goyal , Amit Kumar Dey , Naman Gupta
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Main IPC: H03B19/00
- IPC: H03B19/00 ; G06F7/527 ; G06F7/507

Abstract:
An adder circuit includes first through fourth two-bit adder modules, and first through third result mux blocks for receiving and adding first and second binary values to generate a final sum. A multiplier circuit that multiplies a multiplier and a multiplicand includes a multiplexer, an encoder connected to the multiplexer, a shifter connected to the encoder, and an accumulator connected to the encoder for receiving the multiplier and multiplicand and generating a multiplication product.
Public/Granted literature
- US20140253215A1 BINARY ADDER AND MULTIPLIER CIRCUIT Public/Granted day:2014-09-11
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