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    Modular gray code counter
    1.
    发明授权
    Modular gray code counter 有权
    模块化灰色代码计数器

    公开(公告)号：US08867694B1

    公开(公告)日：2014-10-21

    申请号：US13945937

    申请日：2013-07-19

    Applicant: Naman Gupta ,  Gaurav Goyal ,  Rohit Goyal

    Inventor： Naman Gupta ,  Gaurav Goyal ,  Rohit Goyal

    IPC: H03K21/00 ,  H03K23/00

    CPC classification number: H03K23/005

    Abstract: A Gray code counter has multiple two-bit Gray code counter modules, clock gated integrated cells (CGICs), and a parity bit generator. The CGICs gate clock signals provided to the two-bit counter modules, which reduces dynamic power consumption. The parity bit generator generates a parity bit that indicates a count of binary ones in a counting state.

    Abstract translation: 格雷码计数器具有多个两位格雷码计数器模块，时钟门控集成单元（CGIC）和奇偶校验位发生器。 提供给两位计数器模块的CGIC门控时钟信号降低了动态功耗。 奇偶校验位产生器产生一个奇偶校验位，它表示计数状态下的二进制计数。

    Seller automated engine architecture and methodology for optimized pricing strategies of goods and services
    3.
    发明授权
    Seller automated engine architecture and methodology for optimized pricing strategies of goods and services 有权
    卖方自动化引擎架构和方法，优化货物和服务的定价策略

    公开(公告)号：US08219483B2

    公开(公告)日：2012-07-10

    申请号：US13149116

    申请日：2011-05-31

    Applicant: Mukesh Chatter ,  Rohit Goyal ,  Shiao-bin Soong

    Inventor： Mukesh Chatter ,  Rohit Goyal ,  Shiao-bin Soong

    IPC: G06Q40/00

    CPC classification number: G06Q30/06 ,  G06Q30/0206 ,  G06Q30/0283 ,  G06Q30/08 ,  G06Q40/025 ,  G06Q40/04

    Abstract: An improved seller automated engine architecture methodology particularly (though not exclusively) for use in automated real-time iterative reverse auctions and/or price quotations over the Internet and the like for purchase and sale of goods and services, providing a choice of architectural implementations while enabling price optimization on market share-directed considerations, specific sales target-directed implementations, seller utility derivative-following implementations, model optimizer implementations and explorations, mathematical optimization-oriented and rules-based implementations.

    Abstract translation: 改进的卖方自动引擎架构方法特别（但不是排他地）用于在因特网等的自动化实时迭代反向拍卖和/或价格报价中用于购买和销售商品和服务，提供架构实现的选择， 实现市场份额考虑，特定销售目标导向实现，卖方实用性衍生以下实现，模型优化器实现和探索，数学优化导向和基于规则的实现的价格优化。

    METHOD, SYSTEM AND APPARATUS FOR AUTOMATIC REAL-TIME ITERATIVE COMMERCIAL TRANSACTIONS OVER THE INTERNET IN A MULTIPLE-BUYER, MULTIPLE-SELLER MARKETPLACE OPTIMIZING BOTH BUYER AND SELLER NEEDS BASED UPON THE DYNAMICS OF MARKET CONDITIONS
    6.
    发明申请
    METHOD, SYSTEM AND APPARATUS FOR AUTOMATIC REAL-TIME ITERATIVE COMMERCIAL TRANSACTIONS OVER THE INTERNET IN A MULTIPLE-BUYER, MULTIPLE-SELLER MARKETPLACE OPTIMIZING BOTH BUYER AND SELLER NEEDS BASED UPON THE DYNAMICS OF MARKET CONDITIONS 有权
    方法，系统和设备，用于多个买家的互联网上的自动实时迭代商业交易，基于市场条件动态的多个卖家市场优化两个买方和卖方需求

    公开(公告)号：US20100191580A1

    公开(公告)日：2010-07-29

    申请号：US12716727

    申请日：2010-03-03

    Applicant: Mukesh Chatter ,  Rohit Goyal ,  Priti Chatter

    Inventor： Mukesh Chatter ,  Rohit Goyal ,  Priti Chatter

    IPC: G06Q30/00

    CPC classification number: G06Q30/08 ,  G06Q30/0241 ,  G06Q30/0601 ,  G06Q30/0611 ,  G06Q30/0633 ,  G06Q40/04

    Abstract: A method of communications network shopping by buyers of products and services for purchasing such from sellers in which buyers request an automatic reverse auctioneer or auction controller to initiate a reverse auction in real time amongst willing sellers and to solicit their automatic real-time iterative bidding price quotations for such products and services to be returned automatically over the network back to the controller under the iterative processing guidance of the controller to assure a best bid price quotation for the buyer; and automatically effecting buyer notification or purchase at such best price, all while the buyer may remain on-line, and without any manual intervention.

    Abstract translation: 买方购买产品和服务的方式，由购买者要求自动反向拍卖人或拍卖控制人的卖家购买产品和服务，以便在卖家之间实时进行反向拍卖，并征求他们的自动实时迭代投标价格 这些产品和服务的报价在控制器的迭代处理指导下通过网络自动返回控制器，以确保买方的最佳投标价格报价; 并以最优惠的价格自动实现买方通知或购买，所有这一切都可以在买方可以保持在线的情况下进行，并且不进行任何人工干预。

    Hybrid synchronous/asynchronous counter
    7.
    发明授权
    Hybrid synchronous/asynchronous counter 有权
    混合同步/异步计数器

    公开(公告)号：US09294099B2

    公开(公告)日：2016-03-22

    申请号：US14141458

    申请日：2013-12-27

    Applicant: Rohit Goyal ,  Deepak Kumar Behera ,  Naman Gupta

    Inventor： Rohit Goyal ,  Deepak Kumar Behera ,  Naman Gupta

    IPC: H03K21/00 ,  H03K23/58 ,  H03K19/00 ,  H03K21/10 ,  H03K21/12

    CPC classification number: H03K23/588 ,  H03K19/0008 ,  H03K21/10 ,  H03K21/12 ,  H03K23/58

    Abstract: A hybrid counter generates a multi-bit hybrid counter value. The hybrid counter includes two or more asynchronous counters, each configured to generate a subset of the bits of the multi-bit hybrid counter value. The asynchronous counters are interconnected by a logic gate and a clock gating circuit. The logic gate generates an asynchronous logic value based on the bits generated by the previous asynchronous counters. The clock gating circuit re-times the asynchronous logic value to generate a synchronous logic value that is used to toggle the next asynchronous counter. The hybrid counter functions more accurately than conventional asynchronous counters and with less power than conventional synchronous counters.

    Abstract translation: 混合计数器产生多位混合计数器值。 混合计数器包括两个或多个异步计数器，每个异步计数器被配置为生成多比特混合计数器值的比特的子集。 异步计数器由逻辑门和时钟门控电路互连。 逻辑门根据以前的异步计数器产生的位产生异步逻辑值。 时钟门控电路重新计时异步逻辑值以产生用于切换下一个异步计数器的同步逻辑值。 混合计数器的功能比传统的异步计数器更精确，功耗比传统的同步计数器少。

    MODULAR GRAY CODE COUNTER
    8.
    发明申请
    MODULAR GRAY CODE COUNTER 有权
    模块灰色代码计数器

    公开(公告)号：US20150023463A1

    公开(公告)日：2015-01-22

    申请号：US14495876

    申请日：2014-09-24

    Applicant: Naman Gupta ,  Gaurav Goyal ,  Rohit Goyal

    Inventor： Naman Gupta ,  Gaurav Goyal ,  Rohit Goyal

    IPC: H03K23/00

    CPC classification number: H03K23/005

    Abstract: A Gray code counter has multiple two-bit Gray code counter modules, clock gated integrated cells (CGICs), and a parity bit generator. The CGICs gate clock signals provided to the two-bit counter modules, which reduces dynamic power consumption. The parity bit generator generates a parity bit that indicates a count of binary ones in a counting state.

    Abstract translation: 格雷码计数器具有多个两位格雷码计数器模块，时钟门控集成单元（CGIC）和奇偶校验位发生器。 提供给两位计数器模块的CGIC门控时钟信号降低了动态功耗。 奇偶校验位产生器产生一个奇偶校验位，它表示计数状态下的二进制计数。

    Binary adder and multiplier circuit
    9.
    发明授权
    Binary adder and multiplier circuit 有权
    二进制加法器和乘法器电路

    公开(公告)号：US08933731B2

    公开(公告)日：2015-01-13

    申请号：US14077198

    申请日：2013-11-11

    Applicant: Rohit Goyal ,  Amit Kumar Dey ,  Naman Gupta

    Inventor： Rohit Goyal ,  Amit Kumar Dey ,  Naman Gupta

    IPC: H03B19/00 ,  G06F7/527 ,  G06F7/507

    CPC classification number: G06F7/5272 ,  G06F7/507

    Abstract: An adder circuit includes first through fourth two-bit adder modules, and first through third result mux blocks for receiving and adding first and second binary values to generate a final sum. A multiplier circuit that multiplies a multiplier and a multiplicand includes a multiplexer, an encoder connected to the multiplexer, a shifter connected to the encoder, and an accumulator connected to the encoder for receiving the multiplier and multiplicand and generating a multiplication product.

    Abstract translation: 加法器电路包括第一至第四二位加法器模块，以及第一至第三结果多路复用块，用于接收和添加第一和第二二进制值以产生最终和。 乘法器和乘法器的乘法器电路包括复用器，连接到多路复用器的编码器，连接到编码器的移位器和连接到编码器的累加器，用于接收乘法器并被乘法并产生乘积。

    Method, system and apparatus for automatic real-time iterative commercial transactions over the internet in a multiple-buyer, multiple-seller marketplace optimizing both buyer and seller needs based upon the dynamics of market conditions
    10.
    发明授权
    Method, system and apparatus for automatic real-time iterative commercial transactions over the internet in a multiple-buyer, multiple-seller marketplace optimizing both buyer and seller needs based upon the dynamics of market conditions 有权
    在多买家多卖方市场上通过互联网进行自动实时迭代商业交易的方法，系统和装置，根据市场条件的动态优化买卖双方的需求

    公开(公告)号：US08577745B2

    公开(公告)日：2013-11-05

    申请号：US12716727

    申请日：2010-03-03

    Applicant: Mukesh Chatter ,  Rohit Goyal ,  Priti Chatter

    Inventor： Mukesh Chatter ,  Rohit Goyal ,  Priti Chatter

    IPC: G06Q30/00

    CPC classification number: G06Q30/08 ,  G06Q30/0241 ,  G06Q30/0601 ,  G06Q30/0611 ,  G06Q30/0633 ,  G06Q40/04

    Abstract: A method of communications network shopping by buyers of products and services for purchasing such from sellers in which buyers request an automatic reverse auctioneer or auction controller to initiate a reverse auction in real time amongst willing sellers and to solicit their automatic real-time iterative bidding price quotations for such products and services to be returned automatically over the network back to the controller under the iterative processing guidance of the controller to assure a best bid price quotation for the buyer; and automatically effecting buyer notification or purchase at such best price, all while the buyer may remain on-line, and without any manual intervention.

    Abstract translation: 买方购买产品和服务的方式，由购买者要求自动反向拍卖人或拍卖控制人的卖家购买产品和服务，以便在卖家之间实时进行反向拍卖，并征求他们的自动实时迭代投标价格 这些产品和服务的报价在控制器的迭代处理指导下通过网络自动返回控制器，以确保买方的最佳投标价格报价; 并以最优惠的价格自动实现买方通知或购买，所有这一切都可以在买方可以保持在线的情况下进行，并且不进行任何人工干预。

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