发明授权
US08941182B2 Buried sublevel metallizations for improved transistor density 有权
埋层次级金属化,以提高晶体管密度

Buried sublevel metallizations for improved transistor density
摘要:
Generally, the subject matter disclosed herein relates to modern sophisticated semiconductor devices and methods for forming the same, wherein electrical interconnects between circuit elements based on a buried sublevel metallization may provide improved transistor density. One illustrative method disclosed herein includes forming a contact dielectric layer above first and second transistor elements of a semiconductor device, and after forming the contact dielectric layer, forming a buried conductive element below an upper surface of the contact dielectric layer, the conductive element providing an electrical connection between the first and second transistor elements.
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