Invention Grant
- Patent Title: Method of manufacture of semiconductor isolation structure
- Patent Title (中): 半导体隔离结构的制造方法
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Application No.: US14104575Application Date: 2013-12-12
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Publication No.: US08962445B2Publication Date: 2015-02-24
- Inventor: Kamal Karda , Chandra Mouli
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dickstein Shapiro LLP
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/762 ; H01L27/108 ; H01L29/66
Abstract:
A method of formation of an isolation structure for vertical semiconductor devices, the resulting isolation structure, and a memory device to prevent leakage among adjacent vertical semiconductor devices are described.
Public/Granted literature
- US20140106539A1 SEMICONDUCTOR ISOLATION STRUCTURE AND METHOD OF MANUFACTURE Public/Granted day:2014-04-17
Information query
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