Invention Grant
US08963200B2 Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection
有权
用于ESD保护的可控硅整流器中增加保持电压的方法和装置
- Patent Title: Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection
- Patent Title (中): 用于ESD保护的可控硅整流器中增加保持电压的方法和装置
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Application No.: US13527833Application Date: 2012-06-20
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Publication No.: US08963200B2Publication Date: 2015-02-24
- Inventor: Jam-Wem Lee , Tzu-Heng Chang , Tsung-Che Tsai , Ming-Hsiang Song
- Applicant: Jam-Wem Lee , Tzu-Heng Chang , Tsung-Che Tsai , Ming-Hsiang Song
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/45
- IPC: H01L29/45

Abstract:
Methods and apparatus for increased holding voltage SCRs. A semiconductor device includes a semiconductor substrate of a first conductivity type; a first well of the first conductivity type; a second well of a second conductivity type adjacent to the first well, an intersection of the first well and the second well forming a p-n junction; a first diffused region of the first conductivity type formed at the first well and coupled to a ground terminal; a first diffused region of the second conductivity type formed at the first well; a second diffused region of the first conductivity type formed at the second well and coupled to a pad terminal; a second diffused region of the second conductivity type formed in the second well; and a Schottky junction formed adjacent to the first diffused region of the second conductivity type coupled to a ground terminal. Methods for forming devices are disclosed.
Public/Granted literature
- US20130341676A1 Methods and Apparatus for Increased Holding Voltage in Silicon Controlled Rectifiers for ESD Protection Public/Granted day:2013-12-26
Information query
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