发明授权
US08972769B2 Data processing apparatus and control method for controlling clock frequency based on calculated frequency-to-response-time ratios
有权
数据处理装置和控制方法，用于根据计算出的频率响应时间比来控制时钟频率
- 专利标题： Data processing apparatus and control method for controlling clock frequency based on calculated frequency-to-response-time ratios
- 专利标题（中）： 数据处理装置和控制方法，用于根据计算出的频率响应时间比来控制时钟频率
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申请号： US13011712申请日： 2011-01-21
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公开(公告)号： US08972769B2公开(公告)日： 2015-03-03
- 发明人: Akio Nakagawa , Hisashi Ishikawa
- 申请人： Akio Nakagawa , Hisashi Ishikawa
- 申请人地址： JP Tokyo
- 专利权人： Canon Kabushiki Kaisha
- 当前专利权人： Canon Kabushiki Kaisha
- 当前专利权人地址： JP Tokyo
- 代理机构： Fitzpatrick, Cella, Harper & Scinto
- 优先权： JP2010-026998 20100209; JP2010-252956 20101111
- 主分类号： G06F1/04
- IPC分类号： G06F1/04 ; G06F15/16 ; G06F9/30 ; G06F9/40 ; G06F9/00 ; G06F1/32
摘要：
A data processing apparatus includes: a plurality of processing units adapted to process data according to input operation clocks; and a control unit adapted to measure response times of the plurality of processing units when the operation clocks of a common frequency are supplied to the plurality of processing units, and to control a frequency of the operation clocks to be supplied to at least one of the plurality of processing units so that a plurality of measured response times become closer to each other.
公开/授权文献
- US20110197089A1 DATA PROCESSING APPARATUS AND CONTROL METHOD THEREOF 公开/授权日：2011-08-11
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