Invention Grant
- Patent Title: High voltage tolerant input buffer
- Patent Title (中): 高耐压输入缓冲器
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Application No.: US13922483Application Date: 2013-06-20
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Publication No.: US08975929B2Publication Date: 2015-03-10
- Inventor: Surendra Kumar
- Applicant: STMicroelectronics International N.V.
- Applicant Address: NL Amsterdam
- Assignee: STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics International N.V.
- Current Assignee Address: NL Amsterdam
- Agency: Gardere Wynne Sewell LLP
- Main IPC: H03B1/00
- IPC: H03B1/00 ; H03K19/0175

Abstract:
A circuit includes a first input transistor and a first voltage divider coupled to a source of the first input transistor and a second input transistor and a second voltage divider coupled to a source of the second input transistor. A first set of series connected transistors include a first transistor with a gate coupled to the first input transistor source and a second transistor with a gate coupled to a tap of the first voltage divider. A second set of series connected transistors include a third transistor with a gate coupled to the second input transistor source and a fourth transistor with a gate coupled to a tap of the second voltage divider. An output is coupled to the sources of the first and second input transistors. The first and second sets are coupled to one of the first input transistor drain or second input transistor drain.
Public/Granted literature
- US20140375358A1 HIGH VOLTAGE TOLERANT INPUT BUFFER Public/Granted day:2014-12-25
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