Invention Grant
US08980691B2 Semiconductor device and method of forming low profile 3D fan-out package
有权
半导体器件和形成薄型3D扇出封装的方法
- Patent Title: Semiconductor device and method of forming low profile 3D fan-out package
- Patent Title (中): 半导体器件和形成薄型3D扇出封装的方法
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Application No.: US13931397Application Date: 2013-06-28
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Publication No.: US08980691B2Publication Date: 2015-03-17
- Inventor: Yaojian Lin
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/50
- IPC: H01L21/50 ; H01L21/48 ; H01L21/44 ; H01L23/24 ; H01L23/02 ; H01L23/52 ; H01L23/00 ; H01L23/498

Abstract:
A semiconductor device includes a substrate having an insulating layer and a conductive layer embedded in the insulating layer. The conductive layer is patterned to form conductive pads or conductive pillars. The substrate includes a first encapsulant formed over the conductive layer. A first opening is formed through insulating layer and first encapsulant using a stamping process or laser direct ablation. The substrate is separated into individual units, which are mounted to a carrier. A semiconductor die is disposed in the first opening in the substrate. A second encapsulant is deposited over the semiconductor die and substrate. An interconnect structure is formed over the semiconductor die and substrate. An opening is formed through the second encapsulant and through the insulating layer to expose the conductive layer. A bump is formed in the second opening over the conductive layer outside a footprint of the semiconductor die.
Public/Granted literature
- US20150001708A1 Semiconductor Device and Method of Forming Low Profile 3D Fan-Out Package Public/Granted day:2015-01-01
Information query
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