发明授权
US08987070B2 SOI device with embedded liner in box layer to limit STI recess
有权
具有嵌入式衬垫的SOI器件,用于限制STI凹陷
- 专利标题: SOI device with embedded liner in box layer to limit STI recess
- 专利标题(中): 具有嵌入式衬垫的SOI器件,用于限制STI凹陷
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申请号: US13611182申请日: 2012-09-12
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公开(公告)号: US08987070B2公开(公告)日: 2015-03-24
- 发明人: Kangguo Cheng , Balasubramanian S. Haran , Shom Ponoth
- 申请人: Kangguo Cheng , Balasubramanian S. Haran , Shom Ponoth
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 Vazken Alexanian
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/762 ; H01L21/84 ; H01L27/12 ; H01L29/06 ; H01L29/66 ; H01L29/786
摘要:
A semiconductor substrate having an isolation region and method of forming the same. The method includes the steps of providing a substrate having a substrate layer, a buried oxide (BOX), a silicon on insulator (SOI) layer, a pad oxide layer, and a pad nitride layer, forming a shallow trench region, etching the pad oxide layer to form ears and etching the BOX layer to form undercuts, depositing a liner on the shallow trench region, depositing a soft mask over the surface of the shallow trench region, filling the shallow trench region, etching the soft mask so that it is recessed to the top of the BOX layer, etching the liner off certain regions, removing the soft mask, and filling and polishing the shallow trench region. The liner prevents shorting of the semiconductor device when the contacts are misaligned.
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