A DC power stage provides a power output that tracks a PCM signal input. A mapping unit generates an integer number of N digital PWM signals each switched at a same switching frequency by switching states of the PWM signals one at a time based on a level of the PCM signal input. An imbalance correction unit adjusts a duty ratio of the PWM signals relative to one another based on differentially accumulating errors among the PWM signals to prevent divergence of PWM signals. N corresponding switches therefrom switch power from a DC power source. N inductances in parallel produce a combined signal that is low pass filtered to provide the power output. Switching is between only those state combinations where the switching frequency is cancelled in the combined signal. The switching frequency is a sampling frequency of the PCM signal input divided by a product of 2 times N.