公开(公告)号：US20120275544A1

公开(公告)日：2012-11-01

申请号：US13309862

申请日：2011-12-02

申请人： Pallab Midya ,  Joseph M. Ingino, JR.

发明人： Pallab Midya ,  Joseph M. Ingino, JR.

IPC分类号： H04L27/36 ,  H04L25/49

CPC分类号： H04L27/3809 ,  H03F1/025 ,  H03F3/24 ,  H03F2200/102 ,  H03F2200/435

摘要： A system according to one embodiment includes a digital data modulator configured to generate encoded symbols; an envelope detector configured to receive the encoded symbols and to estimate transmission power information associated with the encoded symbols; a peak detector configured to receive the transmission power information, detect a peak transmission power from two or more sequential data points of the received transmission power information, and to generate a power regulation signal representative of the detected peak transmission power; and a digital to analog converter (DAC) configured to receive the power regulation signal and to provide a reference voltage to a power supply associated with an RF amplifier.

摘要翻译： 根据一个实施例的系统包括被配置为生成编码符号的数字数据调制器; 包络检测器，被配置为接收编码符号并且估计与编码符号相关联的传输功率信息; 峰值检测器，被配置为接收发送功率信息，从所接收的发送功率信息的两个或更多个顺序数据点检测峰值发送功率，并产生表示检测到的峰值发送功率的功率调节信号; 以及被配置为接收功率调节信号并且向与RF放大器相关联的电源提供参考电压的数模转换器（DAC）。

公开(公告)号：US20090102549A1

公开(公告)日：2009-04-23

申请号：US11875998

申请日：2007-10-22

申请人： Pallab Midya ,  Theresa Paulo ,  William J. Roeckner

发明人： Pallab Midya ,  Theresa Paulo ,  William J. Roeckner

IPC分类号： H03F3/38

CPC分类号： H03F3/217

摘要： A switching amplifier includes a power stage, a low pass filter, a combining circuit, and a feedback correction circuit. The power stage has an input terminal and an output terminal. The low pass filter has an input terminal coupled to the output terminal of the power stage, and an output terminal for providing a filtered pulse width modulated signal. The combining circuit has a first input terminal coupled to the output terminal of the power stage, a second input terminal coupled to the output terminal of the low pass filter, and an output terminal. The feedback correction circuit has a first input terminal for receiving a reference pulse width modulated signal, a second input terminal coupled to the output terminal of the combining circuit, and an output terminal coupled to the input terminal of the power stage.

摘要翻译： 开关放大器包括功率级，低通滤波器，组合电路和反馈校正电路。 功率级具有输入端子和输出端子。 低通滤波器具有耦合到功率级的输出端的输入端和用于提供经滤波的脉宽调制信号的输出端。 组合电路具有耦合到功率级的输出端的第一输入端，耦合到低通滤波器的输出端的第二输入端和输出端。 反馈校正电路具有用于接收参考脉冲宽度调制信号的第一输入端子，耦合到组合电路的输出端子的第二输入端子和耦合到功率级输入端子的输出端子。

公开(公告)号：US20080252392A1

公开(公告)日：2008-10-16

申请号：US11733610

申请日：2007-04-10

申请人： Pallab Midya ,  Xin Geng

发明人： Pallab Midya ,  Xin Geng

IPC分类号： H03C3/09

CPC分类号： H03F3/217 ,  H03F2200/351 ,  H03K7/08 ,  H04B15/02 ,  H04B2215/067

摘要： A system is described for generating a discrete noise-shaped variable switching frequency signal that may be used to define a digital pulse width modulation (“PWM”) period. The system may define a switching frequency waveform that may be used to generate a current switching frequency signal as a function of a system clock. The system may quantize the current switching frequency signal to generate a discrete switching frequency signal that is realizable with the system clock. The system may detect quantization noise and input the noise into the current switching frequency signal to eliminate or reduce discrete tones at the switching frequencies of a PWM signal spectrum.

摘要翻译： 描述了一种用于产生可用于定义数字脉宽调制（“PWM”）周期的离散噪声形可变开关频率信号的系统。 系统可以定义可用于产生作为系统时钟的函数的当前开关频率信号的开关频率波形。 该系统可以量化当前开关频率信号以产生可利用系统时钟实现的离散开关频率信号。 该系统可以检测量化噪声并将噪声输入到当前开关频率信号中以消除或减少在PWM信号频谱的开关频率处的离散音调。

公开(公告)号：US07312654B2

公开(公告)日：2007-12-25

申请号：US11314203

申请日：2005-12-20

申请人： William J. Roeckner ,  Pallab Midya ,  Patrick L. Rakers ,  Lawrence E. Connell ,  Daniel A. Mavencamp ,  Bradley C. Stewart

发明人： William J. Roeckner ,  Pallab Midya ,  Patrick L. Rakers ,  Lawrence E. Connell ,  Daniel A. Mavencamp ,  Bradley C. Stewart

IPC分类号： H03F3/38

CPC分类号： H03F3/2173 ,  H03F1/305 ,  H03F3/2171 ,  H03F3/72 ,  H03F2200/03 ,  H03F2200/351 ,  H03K17/161

摘要： A closed loop audio amplifier system and method of powering up/down the system without producing audible artifacts are provided. During power up, a prebias voltage is provided to each output connected to a speaker to increase the voltage to a nominal output level. High impedance switches are then driven at a 50% duty cycle. Feedback from the output is supplied to a servo, which is enabled to fine tune the output voltage. Low impedance switches are then driven at a 50% duty cycle at a quarter cycle timing. The order of the feedback loop depends on which of the high or low impedance switches are driven. The prebias voltage is then removed before audio signals to be amplified are supplied to the system. Timing of driving of the switches is programmable. To power down, essentially the reverse sequence is provided.

摘要翻译： 提供一种闭环音频放大器系统以及在不产生可听见的伪影的情况下对系统加电/下电的方法。 在上电期间，向连接到扬声器的每个输出端提供预偏置电压以将电压增加到额定输出电平。 然后以50％占空比驱动高阻抗开关。 输出端的反馈信号被提供给一个伺服控制器，可以对输出电压进行微调。 然后，在四分之一周期的时间，以50％的占空比驱动低阻抗开关。 反馈环路的顺序取决于驱动高阻抗或低阻抗开关中的哪一个。 然后在将要放大的音频信号提供给系统之前，去除预偏置电压。 开关的驱动时序是可编程的。 为了断电，基本上提供了相反的顺序。

公开(公告)号：US20070109165A1

公开(公告)日：2007-05-17

申请号：US11273286

申请日：2005-11-14

申请人： Pallab Midya ,  William Roeckner ,  John Grosspietsch ,  Anthony Schooler

发明人： Pallab Midya ,  William Roeckner ,  John Grosspietsch ,  Anthony Schooler

IPC分类号： H03M1/66

CPC分类号： H03M3/366 ,  H03M3/432 ,  H03M3/452

摘要： An audio amplifier includes a digital signal processor (DSP) that contains a noise shaping quantizer having an integrating error amplifier. The integrating error amplifier contains integrators connected in a feedback loop, a summer supplied with an output of each of the integrators, and a saturation function module producing a saturation function. A multiplier is disposed between each pair of adjacent integrators. The multiplier receives a signal from one of the adjacent integrators and the saturation function and supplies a signal to the other of the adjacent integrators. The saturation function decreases the effect of all of the integrators except an integrator to which an input signal to the integrating amplifier is supplied using an input signal to and/or an output signal from the noise shaping quantizer. This permits the duty ratio of the output signal from the noise shaping quantizer to extend from 0% to 100%.

摘要翻译： 音频放大器包括包含具有积分误差放大器的噪声整形量化器的数字信号处理器（DSP）。 积分误差放大器包含连接在反馈回路中的积分器，与每个积分器的输出相加的夏季以及产生饱和功能的饱和功能模块。 在每对相邻的积分器之间设置乘法器。 乘法器接收来自相邻积分器之一的信号和饱和度函数，并向相邻的积分器中的另一个提供信号。 饱和功能降低了除了积分器之外的所有积分器的影响，使用来自噪声整形量化器的输入信号和/或来自噪声整形量化器的输出信号向积分放大器提供输入信号。 这允许来自噪声整形量化器的输出信号的占空比从0％延伸到100％。

公开(公告)号：US20050225467A1

公开(公告)日：2005-10-13

申请号：US10819644

申请日：2004-04-07

申请人： Pallab Midya ,  Matthew Miller ,  Patrick Rakers

发明人： Pallab Midya ,  Matthew Miller ,  Patrick Rakers

IPC分类号： H03M1/12 ,  H03M1/34 ,  H03M3/02

CPC分类号： H03M3/00

摘要： A system and method for analog-to-digital conversion using digital pulse width modulation (PWM) is disclosed. The method and system according to the disclosed invention converts an analog input signal to a digital signal in pulse code modulated (PCM) form. The disclosed invention uses a feedback circuit to perform PWM of the analog input signal. The PWM signal is then decimated to obtain the digital signal in PCM form. The system according to the disclosed invention requires lower operating frequency and dissipates lesser power than prior art systems providing the same sampling frequency and resolution. The operation at a lower frequency is achieved by obtaining two samples from every pulse of the PWM signal; the first sample being obtained from the right duty ratio, and the second sample being obtained form the left duty ratio. Further, the disclosed invention has lesser implementation complexity and higher signal-to-noise ratio than prior art.

摘要翻译： 公开了一种使用数字脉宽调制（PWM）进行模数转换的系统和方法。 根据所公开的发明的方法和系统将模拟输入信号转换成脉冲编码调制（PCM）形式的数字信号。 所公开的发明使用反馈电路来执行模拟输入信号的PWM。 然后抽取PWM信号以获得PCM形式的数字信号。 根据所公开的发明的系统需要更低的工作频率并且消耗比提供相同采样频率和分辨率的现有技术系统更小的功率。 通过从PWM信号的每个脉冲获得两个采样来实现较低频率的操作; 从正确的占空比获得第一个样品，并且从左占空比获得第二个样品。 此外，所公开的发明比现有技术具有较小的实现复杂度和更高的信噪比。

公开(公告)号：US20050024133A1

公开(公告)日：2005-02-03

申请号：US10629203

申请日：2003-07-29

申请人： Pallab Midya ,  Steven Bergstedt ,  William Roeckner

发明人： Pallab Midya ,  Steven Bergstedt ,  William Roeckner

IPC分类号： H03F1/32 ,  H03F3/185 ,  H03F3/217 ,  H03F3/38

CPC分类号： H03F3/2173 ,  H03F1/32 ,  H03F1/3247 ,  H03F3/185 ,  H03F3/2171

摘要： Disclosed is a method and/or apparatus for adjusting the sample time and order associated with a digital correction system for maximizing output power and minimizing power stage delay sensitivity of a switching power stage. In certain embodiments, the sample point of an ADC may be changed as a function of the duty ratio of the PWM signal thus allowing higher performance and use of less expensive power stage components. In addition, adjustment of the order of an integrating error amplifier in the system permits operation of the power stage with an output being permitted to saturate up to the power supply rails, thus increasing a power output of the power stage.

公开(公告)号：US06838931B2

公开(公告)日：2005-01-04

申请号：US10844123

申请日：2004-05-12

申请人： Pallab Midya ,  John Grosspietsch ,  Michael Washington

发明人： Pallab Midya ,  John Grosspietsch ,  Michael Washington

IPC分类号： H03F1/02 ,  H03F3/21 ,  H03G3/00 ,  H03F3/38

CPC分类号： H03F3/211 ,  H03F1/0222 ,  H03F1/0277 ,  H03G3/004

摘要： A power amplifier circuit for receiving a variable envelope input signal and for producing an amplified output signal is provided. The power amplifier circuit includes an envelope approximation circuit, an envelope amplifier circuit, a phasor approximation circuit, a quadrature modulation circuit, and a power amplifier. The envelope approximation circuit receives the variable envelope input signal and produces a bandlimited estimated envelope signal, corresponding to the amplitude of the variable envelope input signal. The bandlimited estimated envelope signal is then amplified by an envelope amplifier circuit. The amplified envelope signal is then coupled to the supply input of the power amplifier. The phasor approximation circuit receives the variable envelope input signal and produces a bandlimited estimated phasor signal. The quadrature modulation circuit receives the estimated phase signal and produces a modulated phase signal. The modulated phase signal is then coupled to the signal input of the power amplifier. The power amplifier then produces an amplified output signal.

摘要翻译： 提供一种用于接收可变包络输入信号并产生放大的输出信号的功率放大器电路。 功率放大器电路包括包络近似电路，包络放大器电路，相量近似电路，正交调制电路和功率放大器。 包络近似电路接收可变包络输入信号，并产生对应于可变包络输入信号的幅度的带限估计包络信号。 然后，带通估计包络信号由包络放大器电路放大。 放大的包络信号然后被耦合到功率放大器的电源输入端。 相量近似电路接收可变包络输入信号并产生带限估计的相量信号。 正交调制电路接收估计的相位信号并产生调制相位信号。 然后将调制相位信号耦合到功率放大器的信号输入端。 然后，功率放大器产生放大的输出信号。

公开(公告)号：US06614323B2

公开(公告)日：2003-09-02

申请号：US09995305

申请日：2001-11-27

申请人： Poojan A. Wagh ,  Pallab Midya ,  Patrick Rakers

发明人： Poojan A. Wagh ,  Pallab Midya ,  Patrick Rakers

IPC分类号： H03K700

CPC分类号： H03C3/40

摘要： A device for implementing a method for receiving a complex baseband signal in analog form or in digital form, and providing a pulse modulated signal as a linear modulation of the complex baseband signal is disclosed. First, a complex modulated signal as a function of the complex baseband signal is generated. Second, a bandlimited exponential signal as a function of the complex modulated signal as computed with a truncated Taylor series for an exponential is generated, or a coefficient vector as a function of the complex modulated signal is generated. Finally, a pulse modulated signal as either a function of the bandlimited exponential signal or the coefficient vector is generated.

摘要翻译： 公开了一种用于实现用于以模拟形式或数字形式接收复基带信号的方法，并提供脉冲调制信号作为复基带信号的线性调制的装置。 首先，生成作为复基带信号的函数的复调制信号。 第二，产生作为用指数的截断泰勒级数计算的复调制信号的函数的带限指数信号，或者产生作为复调制信号的函数的系数向量。 最后，产生作为带限指数信号或系数矢量的函数的脉冲调制信号。

公开(公告)号：US06348781B1

公开(公告)日：2002-02-19

申请号：US09733722

申请日：2000-12-11

申请人： Pallab Midya ,  Lawrence E. Connell ,  Kenneth R. Haddad

发明人： Pallab Midya ,  Lawrence E. Connell ,  Kenneth R. Haddad

IPC分类号： G05F1613

CPC分类号： H03F1/0227 ,  H02M3/1582

摘要： A buck or boost (BOB) power converter circuit. A buck converter is cascaded with a boost converter to form a buck or boost circuit (20). The BOB converter is controlled by a controller (26) such that only the buck or boost converter is operating at any given time. A reference signal Vref can be applied to the controller (26) such that the output voltage from the converter closely tracks the reference signal. Positive and negative ramp signals are generated and an error feedback signal is compared with the ramp signals to control the output in accord with Vref. This is useful in application of the output voltage as the power supply to an RF Power Amplifier (16) so that the reference signal can represent the envelope of a signal to be transmitted and the RF PA (16) can operate at high efficiency.

摘要翻译： 降压或升压（BOB）电源转换器电路。 降压转换器与升压转换器级联以形成降压或升压电路（20）。 BOB转换器由控制器（26）控制，使得只有降压或升压转换器在任何给定时间运行。 参考信号Vref可以被施加到控制器（26），使得来自转换器的输出电压紧密地跟踪参考信号。 产生正和负斜坡信号，并将误差反馈信号与斜坡信号进行比较，以根据Vref控制输出。 这在将输出电压作为RF功率放大器（16）的电源应用时是有用的，使得参考信号可以表示要发送的信号的包络，并且RF PA（16）可以以高效率运行。