Invention Grant
US09000524B2 Method and apparatus for modeling multi-terminal MOS device for LVS and PDK
有权
用于建立LVS和PDK的多端MOS器件的方法和装置
- Patent Title: Method and apparatus for modeling multi-terminal MOS device for LVS and PDK
- Patent Title (中): 用于建立LVS和PDK的多端MOS器件的方法和装置
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Application No.: US13081092Application Date: 2011-04-06
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Publication No.: US09000524B2Publication Date: 2015-04-07
- Inventor: Chau-Wen Wei , Cheng-Te Chang , Chin-yuan Huang , Chih Ming Yang , Yi-Kan Cheng
- Applicant: Chau-Wen Wei , Cheng-Te Chang , Chin-yuan Huang , Chih Ming Yang , Yi-Kan Cheng
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/088 ; H01L21/8234 ; H01L21/8238 ; H01L27/06 ; H01L27/02 ; G06F17/50

Abstract:
An apparatus comprises two n-type metal oxide semiconductor (MOS) devices formed next to each other. Each n-type MOS device further includes a pair of face-to-face diodes formed in an isolation ring. A method of modeling the apparatus comprises reusing four-terminal MOS device models in standard cell libraries and combining the four-terminal MOS device model and the isolation ring model into a 4T MOS plus isolation ring model. The method of modeling the apparatus further comprises adding a dummy device between a body contact of the first n-type MOS device and a body contact of the second n-type MOS device.
Public/Granted literature
- US20120256271A1 Method and Apparatus for Modeling Multi-terminal MOS Device for LVS and PDK Public/Granted day:2012-10-11
Information query
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