Invention Grant
- Patent Title: Forming arsenide-based complementary logic on a single substrate
- Patent Title (中): 在单个基板上形成基于砷的互补逻辑
-
Application No.: US11712191Application Date: 2007-02-28
-
Publication No.: US09006707B2Publication Date: 2015-04-14
- Inventor: Mantu K. Hudait , Jack T. Kavalieros , Suman Datta , Marko Radosavljevic
- Applicant: Mantu K. Hudait , Jack T. Kavalieros , Suman Datta , Marko Radosavljevic
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/8238 ; H01L21/8252 ; B82Y10/00 ; H01L21/8258 ; H01L27/06 ; H01L29/04

Abstract:
In one embodiment, the present invention includes a method for forming a logic device, including forming an n-type semiconductor device over a silicon (Si) substrate that includes an indium gallium arsenide (InGaAs)-based stack including a first buffer layer, a second buffer layer formed over the first buffer layer, a first device layer formed over the second buffer layer. Further, the method may include forming a p-type semiconductor device over the Si substrate from the InGaAs-based stack and forming an isolation between the n-type semiconductor device and the p-type semiconductor device. Other embodiments are described and claimed.
Public/Granted literature
- US20080203381A1 Forming arsenide-based complementary logic on a single substrate Public/Granted day:2008-08-28
Information query
IPC分类: