发明授权
US09007248B2 MASH sigma-delta modulator and DA converter circuit 有权
MASHΣ-Δ调制器和DA转换器电路

  • 专利标题: MASH sigma-delta modulator and DA converter circuit
  • 专利标题(中): MASHΣ-Δ调制器和DA转换器电路
  • 申请号: US14028905
    申请日: 2013-09-17
  • 公开(公告)号: US09007248B2
    公开(公告)日: 2015-04-14
  • 发明人: Kazuaki Oishi
  • 申请人: Fujitsu Limited
  • 申请人地址: JP Kawasaki
  • 专利权人: Fujitsu Limited
  • 当前专利权人: Fujitsu Limited
  • 当前专利权人地址: JP Kawasaki
  • 代理机构: Arent Fox LLP
  • 主分类号: H03M3/00
  • IPC分类号: H03M3/00 H03M7/30
MASH sigma-delta modulator and DA converter circuit
摘要:
A MASH sigma-delta modulator includes: parallel integration units in M stages configured to receive N pieces of data from a previous stage, to perform integral calculation in parallel; parallel differentiation units each configured to calculate a difference between neighboring overflows of the corresponding parallel integration unit of the integration part; and a parallel-to-serial conversion part configured to parallel-to-serial convert outputs from the differentiation part, wherein the parallel integration units receive pieces of input data in parallel, the parallel integration unit in each stage and the parallel differentiation unit in each stage perform integral calculation and differential calculation in each stage in one operation clock of a frequency 1/N times a master clock frequency, and the parallel-to-serial conversion part outputs the result of the parallel-to-serial conversion in synchronization with the master clock.
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