A MASH sigma-delta modulator includes: parallel integration units in M stages configured to receive N pieces of data from a previous stage, to perform integral calculation in parallel; parallel differentiation units each configured to calculate a difference between neighboring overflows of the corresponding parallel integration unit of the integration part; and a parallel-to-serial conversion part configured to parallel-to-serial convert outputs from the differentiation part, wherein the parallel integration units receive pieces of input data in parallel, the parallel integration unit in each stage and the parallel differentiation unit in each stage perform integral calculation and differential calculation in each stage in one operation clock of a frequency 1/N times a master clock frequency, and the parallel-to-serial conversion part outputs the result of the parallel-to-serial conversion in synchronization with the master clock.