Invention Grant
- Patent Title: MOS transistor on SOI protected against overvoltages
- Patent Title (中): SOI上的MOS晶体管防过电压
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Application No.: US13921436Application Date: 2013-06-19
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Publication No.: US09012955B2Publication Date: 2015-04-21
- Inventor: Pascal Fonteneau
- Applicant: STMicroelectronics SA
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics SA
- Current Assignee: STMicroelectronics SA
- Current Assignee Address: FR Montrouge
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Priority: FR12/56762 20120713
- Main IPC: H01L29/749
- IPC: H01L29/749 ; H01L27/02 ; H01L27/12

Abstract:
A MOS transistor protected against overvoltages formed in an SOI-type semiconductor layer arranged on an insulating layer itself arranged on a semiconductor substrate including a lateral field-effect control thyristor formed in the substrate at least partly under the MOS transistor, a field-effect turn-on region of the thyristor extending under at least a portion of a main electrode of the MOS transistor and being separated therefrom by said insulating layer, the anode and the cathode of the thyristor being respectively connected to the drain and to the source of the MOS transistor, whereby the thyristor turns on in case of a positive overvoltage between the drain and the source of the MOS transistor.
Public/Granted literature
- US20140015002A1 MOS TRANSISTOR ON SOI PROTECTED AGAINST OVERVOLTAGES Public/Granted day:2014-01-16
Information query
IPC分类: