Invention Grant
- Patent Title: Interconnection structure for semiconductor package
- Patent Title (中): 半导体封装的互连结构
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Application No.: US13677861Application Date: 2012-11-15
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Publication No.: US09013042B2Publication Date: 2015-04-21
- Inventor: Chang-Fu Lin , Ho-Yi Tsai , Chin-Tsai Yao , Jui-Chung Ho , Ching-Hui Hung
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW101131977A 20120903
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/532 ; H01L23/00
Abstract:
An interconnection structure for being formed on bonding pads of a substrate in a semiconductor package is provided. The interconnection structure includes a nickel layer formed on each of the bonding pads, a metal layer formed on the nickel layer, and a solder material formed on the metal layer. The metal layer is made of one of gold, silver, lead and copper, and has a thickness in the range of 0.5 to 5 um. As such, when the solder material is reflowed to form solder bumps, no nickel-tin compound is formed between the solder bumps and the metal layer, thereby avoiding cracking or delamination of the solder bumps.
Public/Granted literature
- US20140061928A1 INTERCONNECTION STRUCTURE FOR SEMICONDUCTOR PACKAGE Public/Granted day:2014-03-06
Information query
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