A liquid crystal display device (1) includes a liquid crystal panel having a plurality of pixels disposed in a matrix form, and a patterned retarder having retarder plates (RR) and retarder plates (RL) formed at positions corresponding to odd-numbered rows and even-numbered rows, respectively, of the liquid crystal panel. Among sub pixels disposed in the pixels positioned in the n-th row, a sub pixel electrode of a boundary-proximity sub pixel, which is positioned closest to a boundary between the associated retarder plate (RR) and the associated retarder plate (RL), is connected to an auxiliary bus line via a transistor having a gate electrode connected to a gate bus line in the (n−1)-th or prior row. In the second display mode, gate signals are sequentially supplied to the gate bus lines in order from the first to the N-th rows, and, in the first display mode, gate signals are sequentially supplied to the gate bus lines in order from the N-th to the first rows.