发明授权
- 专利标题: Sampling clock synchronizing apparatus, digital coherent receiving apparatus, and sampling clock synchronizing method
- 专利标题(中): 采样时钟同步装置,数字相干接收装置和采样时钟同步方法
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申请号: US13345008申请日: 2012-01-06
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公开(公告)号: US09014575B2公开(公告)日: 2015-04-21
- 发明人: Hisao Nakashima , Takeshi Hoshida
- 申请人: Hisao Nakashima , Takeshi Hoshida
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Fujitsu Patent Center
- 优先权: JP2011-018847 20110131
- 主分类号: H04B10/06
- IPC分类号: H04B10/06 ; H04L7/027 ; H04L7/033
摘要:
In a sampling clock synchronizing apparatus, an A/D converter converts an analog signal to a digital signal based on a sampling clock, and a processor compensates a band limitation due to spectral narrowing by filter characteristics of characteristics opposite to those of the spectral narrowing with respect to a signal produced from the A/D converter subjected to the spectral narrowing, and detects a phase shift in the sampling clock based on a signal after the compensation of the spectral narrowing and synchronizes sampling timing.
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