发明授权
- 专利标题： Semiconductor package and method of manufacturing the same
- 专利标题（中）： 半导体封装及其制造方法
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申请号： US13688823申请日： 2012-11-29
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公开(公告)号： US09041182B2公开(公告)日： 2015-05-26
- 发明人: Toshihiko Nagano , Kazuhide Abe , Hiroshi Yamada , Kazuhiko Itaya , Taihei Nakada
- 申请人： Toshihiko Nagano , Kazuhide Abe , Hiroshi Yamada , Kazuhiko Itaya , Taihei Nakada
- 申请人地址： JP Tokyo
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Tokyo
- 代理机构： Oblon, McClelland, Maier & Neustadt, L.L.P.
- 优先权： JP2012-075518 20120329
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L21/78 ; H01L23/055 ; H01L23/10 ; H01L23/00 ; H01L23/66
摘要：
A semiconductor package according to embodiments includes: a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof; a front-side cap portion including an air gap in a portion between the semiconductor chip and the front-side cap portion and a front-side penetrating electrode, and is positioned to face the front surface of the semiconductor chip; a back-side cap portion bonded with a first cap portion to hermetically seal the semiconductor chip, includes an air gap at least in a portion between the semiconductor chip and the back-side cap portion and a back-side penetrating electrode, and is positioned to face the back surface of the semiconductor chip; a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; and a back-side connecting portion which electrically connects the back electrode and the back-side penetrating electrode.