Invention Grant
- Patent Title: Chip arrangement and a method of manufacturing a chip arrangement
- Patent Title (中): 芯片布置和芯片布置方法
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Application No.: US13798141Application Date: 2013-03-13
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Publication No.: US09041226B2Publication Date: 2015-05-26
- Inventor: Rainer Steiner , Edward Fuergut , Khalil Hosseini , Georg Meyer-Berg , Joachim Mahler
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee Address: DE Neubiberg
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/00 ; H01L23/00 ; H01L23/495 ; H01L23/31
Abstract:
In various embodiments, a chip arrangement is provided. The chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may include at least two chip contacts and an insulating adhesive between the chip and the chip carrier to adhere the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier.
Public/Granted literature
- US20140264950A1 CHIP ARRANGEMENT AND A METHOD OF MANUFACTURING A CHIP ARRANGEMENT Public/Granted day:2014-09-18
Information query
IPC分类:
