Invention Grant
- Patent Title: Generating hardware events via the instruction stream for microprocessor verification
- Patent Title (中): 通过微处理器验证的指令流生成硬件事件
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Application No.: US12843594Application Date: 2010-07-26
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Publication No.: US09043584B2Publication Date: 2015-05-26
- Inventor: Christopher Lee Colletti , Bryan Glen Hickerson , Michael Joseph Schiffli
- Applicant: Christopher Lee Colletti , Bryan Glen Hickerson , Michael Joseph Schiffli
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Van Leeuwen + Van Leeuwen
- Agent William J. Stock
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F7/38 ; G06F9/00 ; G06F9/44 ; G06F9/30 ; G06F11/22 ; G06F11/263
Abstract:
A processor receives an instruction operation (OP) code from a verification system. The instruction OP code includes instruction bits and forced event bits. The processor identifies a forced event based upon the forced event bits, which is unrelated to an instruction that corresponds to the instruction bits. In turn, the processor executes the forced event.
Public/Granted literature
- US20120023315A1 Generating Hardware Events Via the Instruction Stream for Microprocessor Verification Public/Granted day:2012-01-26
Information query
