Invention Grant
- Patent Title: Integrated circuit packaging system with substrate and method of manufacture thereof
- Patent Title (中): 具有基板的集成电路封装系统及其制造方法
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Application No.: US13842582Application Date: 2013-03-15
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Publication No.: US09059157B2Publication Date: 2015-06-16
- Inventor: Yaojian Lin , Il Kwon Shim , JunMo Koo , Jose Alvin Caparas
- Applicant: Yaojian Lin , Il Kwon Shim , JunMo Koo , Jose Alvin Caparas
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/768 ; H01L23/00 ; H01L23/16
Abstract:
An integrated circuit packaging system and method of manufacture thereof includes: a substrate having a top insulation layer and a top conductive layer; an inter-react layer on the substrate; an integrated circuit die on the substrate; a package body on the inter-react layer and the integrated circuit die; and a top solder bump on the top conductive layer, the top solder bump in a 3D via formed through the package body, the inter-react layer, and the top insulation layer for exposing the top conductive layer in the 3D via.
Public/Granted literature
- US20130320525A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2013-12-05
Information query
IPC分类:
