发明授权
- 专利标题: Efficient multiplication, exponentiation and modular reduction implementations
- 专利标题(中): 有效的乘法,乘法和模块化削减实现
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申请号: US13994782申请日: 2011-12-05
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公开(公告)号: US09092645B2公开(公告)日: 2015-07-28
- 发明人: Erdinc Ozturk , Vinodh Gopal , Gilbert M. Wolrich , Wajdi K. Feghali , James D. Guilford , Deniz Karakoyunlu , Martin G. Dixon , Kahraman D. Akdemir
- 申请人: Erdinc Ozturk , Vinodh Gopal , Gilbert M. Wolrich , Wajdi K. Feghali , James D. Guilford , Deniz Karakoyunlu , Martin G. Dixon , Kahraman D. Akdemir
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Grossman, Tucker, Perreault & Pfleger, PLLC
- 国际申请: PCT/US2011/063328 WO 20111205
- 国际公布: WO2013/085487 WO 20130613
- 主分类号: H04L29/00
- IPC分类号: H04L29/00 ; G06F21/71 ; H04L9/30
摘要:
In one embodiment, the present disclosure provides a method that includes segmenting an n-bit exponent e into a first segment et and a number t of k-bit segments ei in response to a request to determine a modular exponentiation result R, wherein R is a modular exponentiation of a generator base g for the exponent e and a q-bit modulus m, wherein the generator base g equals two and k is based at least in part on a processor configured to determine the result R; iteratively determining a respective intermediate modular exponentiation result for each segment ei, wherein the determining comprises multiplication, exponentiation and a modular reduction of at least one of a multiplication result and an exponentiation result; and generating the modular exponentiation result R=ge mod m based on, at least in part, at least one respective intermediate modular exponentiation result.
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