Invention Grant
US09105467B2 Dummy cell array for fin field-effect transistor device and semiconductor integrated circuit including the dummy cell array
有权
用于鳍场效应晶体管器件的虚拟单元阵列和包括虚拟单元阵列的半导体集成电路
- Patent Title: Dummy cell array for fin field-effect transistor device and semiconductor integrated circuit including the dummy cell array
- Patent Title (中): 用于鳍场效应晶体管器件的虚拟单元阵列和包括虚拟单元阵列的半导体集成电路
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Application No.: US14487702Application Date: 2014-09-16
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Publication No.: US09105467B2Publication Date: 2015-08-11
- Inventor: Ji-Myoung Lee , Young-Soo Song , Jun-Min Lee , Bo-Young Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2013-0114684 20130926
- Main IPC: H01L27/01
- IPC: H01L27/01 ; H01L27/12 ; H01L31/0392 ; H01L27/02 ; H01L27/088 ; H01L29/66 ; H01L21/8234

Abstract:
A semiconductor device includes a substrate; a device area of the substrate, the device area including a plurality of device unit cells; and a dummy cell array arranged around the device area. The dummy cell array includes a plurality of dummy unit cells repeatedly arranged in a first direction and a second direction perpendicular to the first direction, each of the dummy cell unit having a structure corresponding to a device unit cell. The device unit cell includes at least a first transistor in the device area. The structure of the dummy unit cell includes an active area and a gate line. For each dummy unit cell, the active area and the gate line extend beyond a cell boundary that defines the dummy unit cell.
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