Plasma processing device
    1.
    发明授权

    公开(公告)号:US10276349B2

    公开(公告)日:2019-04-30

    申请号:US14699443

    申请日:2015-04-29

    Abstract: A plasma processing device is provided. The plasma processing device includes a plate formed between a window covering a top portion of a chamber where plasma processing is performed and an antenna generating a magnetic field, and a fluid supply unit supplying a fluid for controlling temperatures of the window and the antenna, wherein the plate includes first and second regions supplied with the fluid, and the fluid supply unit independently controls the first and second regions.

    Plasma Processing Device
    2.
    发明申请
    Plasma Processing Device 审中-公开
    等离子处理装置

    公开(公告)号:US20160104604A1

    公开(公告)日:2016-04-14

    申请号:US14699443

    申请日:2015-04-29

    CPC classification number: H01J37/32119 H01J37/321 H01J37/32522 H01J37/3299

    Abstract: A plasma processing device is provided. The plasma processing device includes a plate formed between a window covering a top portion of a chamber where plasma processing is performed and an antenna generating a magnetic field, and a fluid supply unit supplying a fluid for controlling temperatures of the window and the antenna, wherein the plate includes first and second regions supplied with the fluid, and the fluid supply unit independently controls the first and second regions.

    Abstract translation: 提供等离子体处理装置。 等离子体处理装置包括形成在覆盖进行等离子体处理的室的顶部的窗口和产生磁场的天线之间的板和供应用于控制窗口和天线的温度的流体的流体供应单元,其中 板包括被供应流体的第一和第二区域,并且流体供应单元独立地控制第一和第二区域。

    Dummy cell array for fin field-effect transistor device and semiconductor integrated circuit including the dummy cell array
    3.
    发明授权
    Dummy cell array for fin field-effect transistor device and semiconductor integrated circuit including the dummy cell array 有权
    用于鳍场效应晶体管器件的虚拟单元阵列和包括虚拟单元阵列的半导体集成电路

    公开(公告)号:US09105467B2

    公开(公告)日:2015-08-11

    申请号:US14487702

    申请日:2014-09-16

    Abstract: A semiconductor device includes a substrate; a device area of the substrate, the device area including a plurality of device unit cells; and a dummy cell array arranged around the device area. The dummy cell array includes a plurality of dummy unit cells repeatedly arranged in a first direction and a second direction perpendicular to the first direction, each of the dummy cell unit having a structure corresponding to a device unit cell. The device unit cell includes at least a first transistor in the device area. The structure of the dummy unit cell includes an active area and a gate line. For each dummy unit cell, the active area and the gate line extend beyond a cell boundary that defines the dummy unit cell.

    Abstract translation: 半导体器件包括衬底; 所述衬底的器件区域,所述器件区域包括多个器件单元电池; 以及布置在设备区域周围的虚拟单元阵列。 虚设单元阵列包括沿第一方向重复地排列的多个虚拟单位单元和垂直于第一方向的第二方向,虚拟单元单元具有对应于器件单位单元的结构。 器件单元电池在器件区域中至少包括第一晶体管。 虚拟单元的结构包括有源区和栅极线。 对于每个虚拟单元,有源区和栅极线延伸超过限定虚拟单元的单元边界。

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