Invention Grant
- Patent Title: Transistor structures and integrated circuitry comprising an array of transistor structures
- Patent Title (中): 晶体管结构和包括晶体管结构阵列的集成电路
-
Application No.: US14032541Application Date: 2013-09-20
-
Publication No.: US09129847B2Publication Date: 2015-09-08
- Inventor: Fernando Gonzalez
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/78 ; H01L21/8234 ; H01L21/84 ; H01L27/12

Abstract:
This invention includes a capacitorless one transistor DRAM cell that includes a pair of spaced source/drain regions received within semiconductive material. An electrically floating body region is disposed between the source/drain regions within the semiconductive material. A first gate spaced is apart from and capacitively coupled to the body region between the source/drain regions. A pair of opposing conductively interconnected second gates are spaced from and received laterally outward of the first gate. The second gates are spaced from and capacitively coupled to the body region laterally outward of the first gate and between the pair of source/drain regions. Methods of forming lines of capacitorless one transistor DRAM cells are disclosed.
Public/Granted literature
- US20140021550A1 Transistor Structures And Integrated Circuitry Comprising An Array of Transistor Structures Public/Granted day:2014-01-23
Information query
IPC分类: