Invention Grant
US09130064B2 Method for fabricating leadframe-based semiconductor package with connecting pads top and bottom surfaces of carrier
有权
用于制造带框架的半导体封装的方法,其具有连接焊盘顶部和底部表面
- Patent Title: Method for fabricating leadframe-based semiconductor package with connecting pads top and bottom surfaces of carrier
- Patent Title (中): 用于制造带框架的半导体封装的方法,其具有连接焊盘顶部和底部表面
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Application No.: US14086142Application Date: 2013-11-21
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Publication No.: US09130064B2Publication Date: 2015-09-08
- Inventor: Chang-Yueh Chan , Chih-Ming Huang , Chun-Yuan Li , Chih-Hsin Lai
- Applicant: Siliconware Precision Industries Co., Ltd
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW96129512A 20070810
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00 ; H01L23/495 ; H01L21/56

Abstract:
A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier s greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.
Public/Granted literature
- US20140080264A1 METHOD FOR FABRICATING LEADFRAME-BASED SEMICONDUCTOR PACKAGE Public/Granted day:2014-03-20
Information query
IPC分类: