发明授权
- 专利标题： Dummy gate structure for semiconductor devices
- 专利标题（中）： 半导体器件的虚拟门结构
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申请号： US13345059申请日： 2012-01-06
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公开(公告)号： US09136349B2公开(公告)日： 2015-09-15
- 发明人: Shih-Chi Fu , Chien-Chih Chou
- 申请人： Shih-Chi Fu , Chien-Chih Chou
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L29/66
- IPC分类号： H01L29/66 ; H01L21/8234 ; H01L27/02 ; H01L21/762
摘要：
A structure and method for fabricating a spacer structure for semiconductor devices, such as a multi-gate structure, is provided. The dummy gate structure is formed by depositing a dielectric layer, forming a mask over the dielectric layer, and patterning the dielectric layer. The mask is formed to have a tapered edge. In an embodiment, the tapered edge is formed in a post-patterning process, such as a baking process. In another embodiment, a relatively thick mask layer is utilized such that during patterning a tapered results. The profile of the tapered mask is transferred to the dielectric layer, thereby providing a tapered edge on the dielectric layer.
公开/授权文献
- US20130175660A1 Dummy Gate Structure for Semiconductor Devices 公开/授权日：2013-07-11
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