Invention Grant
US09142633B2 Integrated circuits and methods for fabricating integrated circuits with silicide contacts on non-planar structures
有权
用于在非平面结构上制造具有硅化物触点的集成电路的集成电路和方法
- Patent Title: Integrated circuits and methods for fabricating integrated circuits with silicide contacts on non-planar structures
- Patent Title (中): 用于在非平面结构上制造具有硅化物触点的集成电路的集成电路和方法
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Application No.: US13714049Application Date: 2012-12-13
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Publication No.: US09142633B2Publication Date: 2015-09-22
- Inventor: Paul R. Besser , Mark V. Raymond , Valli Arunachalam , Hoon Kim
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/283
- IPC: H01L21/283 ; H01L29/49 ; H01L21/285 ; H01L29/417 ; H01L29/66 ; H01L29/78
Abstract:
Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate and forming fins over the semiconductor substrate. Each fin is formed with sidewalls. The method further includes conformally depositing a metal film stack on the sidewalls of each fin. In the method, the metal film stack is annealed to form a metal silicide film over the sidewalls of each fin.
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