发明授权
- 专利标题: Method and apparatus for partitioned pipelined execution of multiple execution threads
- 专利标题(中): 分割流水线执行多个执行线程的方法和装置
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申请号: US11479245申请日: 2006-06-29
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公开(公告)号: US09146745B2公开(公告)日: 2015-09-29
- 发明人: Stephan Jourdan , Robert Hinton
- 申请人: Stephan Jourdan , Robert Hinton
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Nicholson De Vos Webster & Elliot LLP
- 主分类号: G06F9/38
- IPC分类号: G06F9/38
摘要:
Methods and apparatus for partitioning a microprocessor pipeline to support pipelined branch prediction and instruction fetching of multiple execution threads. A thread selection stage selects a thread from a plurality of execution threads. In one embodiment, storage in a branch prediction output queue is pre-allocated to a portion of the thread in one branch prediction stage in order to prevent stalling of subsequent stages in the branch prediction pipeline. In another embodiment, an instruction fetch stage fetches instructions at a fetch address corresponding to a portion of the selected thread. Another instruction fetch stage stores the instruction data in an instruction fetch output queue if enough storage is available. Otherwise, instruction fetch stages corresponding to the selected thread are invalidated and refetched to avoid stalling preceding stages in the instruction fetch pipeline, which may be fetching instructions of another thread.