发明授权
- 专利标题： Bus system in SoC and method of gating root clocks therefor
- 专利标题（中）： SoC中的总线系统和门控时钟的方法
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申请号： US13556545申请日： 2012-07-24
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公开(公告)号： US09152213B2公开(公告)日： 2015-10-06
- 发明人: Jaegeun Yun , Lingling Liao , Bub-chul Jeong
- 申请人： Jaegeun Yun , Lingling Liao , Bub-chul Jeong
- 申请人地址： KR Suwon-si, Gyeonggi-do
- 专利权人： SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人： SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人地址： KR Suwon-si, Gyeonggi-do
- 代理机构： Lee & Morse, P.C.
- 优先权： KR10-2011-0073401 20110725
- 主分类号： G06F1/32
- IPC分类号： G06F1/32 ; G06F1/10 ; G06F13/40
摘要：
A system-on-chip bus system includes a bus configured to connect function blocks of a system-on-chip to each other, and a clock gating unit connected to an interface unit of the bus and configured to basically gate a clock used in the operation of a bus bridge device mounted on the bus according to a state of a transaction detection signal.
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