To provide a DC/DC converter equipped with a clamp circuit having low power consumption, and reducible in chip area. A clamp circuit which clamps an output terminal of an error amplifier circuit equipped with an amplifier and a first transistor connected to an output terminal of the amplifier is configured to include a second transistor having a source connected to a source of the first transistor, a gate connected to a constant voltage circuit, and a drain connected to a constant current circuit, and a third transistor having a gate connected to the drain of the second transistor and a drain connected to the output of the amplifier.