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公开(公告)号：US09444335B2
公开(公告)日：2016-09-13
申请号：US14610792
申请日：2015-01-30
Applicant: Seiko Instruments Inc.
Inventor： Michiyasu Deguchi , Kosuke Takada , Tetsuya Makino
CPC classification number: H02M3/156 , H02M2001/0025 , H02M2003/1566
Abstract: Provided is a switching regulator configured to achieve a 100% Duty state and reduce an occurrence of an overshoot. The switching regulator has a configuration in which a clamp circuit configured to dynamically generate a clamp level clamps an output voltage of an error amplifier in accordance with a peak value of a triangular wave signal.
Abstract translation: 提供了一种开关调节器，其被配置为实现100％占空状态并且减少过冲的发生。 开关调节器具有这样的结构，其中被配置为动态地产生钳位电平的钳位电路根据三角波信号的峰值钳位误差放大器的输出电压。
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公开(公告)号：US08829885B2
公开(公告)日：2014-09-09
申请号：US13784139
申请日：2013-03-04
Applicant: Seiko Instruments Inc.
Inventor： Nao Otsuka , Kosuke Takada
Abstract: Provided is a voltage reference circuit which is able to obtain high PSRR without a variation in power-supply voltage and an influence of noise. A voltage reference circuit for performing voltage-current conversion on forward voltages of PN junction elements and on a difference therebetween to generate a voltage so as not to depend on a temperature is constituted by an amplifier for controlling a temperature characteristic of a voltage of an output terminal, a source follower circuit for supplying a power to the amplifier, and a PMOS transistor which is controlled by the amplifier and which controls a current to flow into the PN junction elements.
Abstract translation: 提供了能够在电源电压变化和噪声的影响的情况下获得高PSRR的电压基准电路。 用于对PN结元件的正向电压进行电压 - 电流转换的电压参考电路和它们之间的差异以产生不依赖于温度的电压由用于控制输出电压的温度特性的放大器构成 端子，用于向放大器供电的源极跟随器电路和由放大器控制并且控制电流流入PN结元件的PMOS晶体管。
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Patent Agency Ranking
公开(公告)号：US09910452B2
公开(公告)日：2018-03-06
申请号：US14490399
申请日：2014-09-18
Applicant: Seiko Instruments Inc.
Inventor： Kosuke Takada , Masakazu Sugiura
Abstract: Provided is a reference voltage circuit capable of adjusting an arbitrary output voltage to have arbitrary temperature characteristics. The reference voltage circuit includes: a reference current generating circuit configured to convert a difference between forward voltages of a plurality of PN junction elements into current to generate a first current; a current generating circuit configured to use the first current generated by the reference current generating circuit to generate a second current; and a voltage generating circuit including a first resistive element and a second resistive element, the first resistive element being configured to generate a first voltage having positive temperature characteristics when the first current flows through the first resistive element, the second resistive element being configured to generate a second voltage having negative temperature characteristics when the first current and the second current flow through the second resistive element. The reference voltage circuit outputs a reference voltage obtained by adding the first voltage to the second voltage.
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公开(公告)号：US09160230B2
公开(公告)日：2015-10-13
申请号：US14619760
申请日：2015-02-11
Applicant: Seiko Instruments Inc.
Inventor： Kosuke Takada
CPC classification number: H02M3/156 , H02M3/158 , H02M2001/0025
Abstract: To provide a DC/DC converter equipped with a clamp circuit having low power consumption, and reducible in chip area. A clamp circuit which clamps an output terminal of an error amplifier circuit equipped with an amplifier and a first transistor connected to an output terminal of the amplifier is configured to include a second transistor having a source connected to a source of the first transistor, a gate connected to a constant voltage circuit, and a drain connected to a constant current circuit, and a third transistor having a gate connected to the drain of the second transistor and a drain connected to the output of the amplifier.
Abstract translation: 提供一种具有低功耗的钳位电路的DC / DC转换器，并且可减少芯片面积。 夹持装有放大器的误差放大器电路的输出端和连接到放大器的输出端的第一晶体管的钳位电路被配置为包括具有连接到第一晶体管的源极的源极的第二晶体管，栅极 连接到恒压电路，以及连接到恒流电路的漏极，以及具有连接到第二晶体管的漏极的栅极和连接到放大器的输出的漏极的第三晶体管。
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公开(公告)号：US09030249B2
公开(公告)日：2015-05-12
申请号：US14182950
申请日：2014-02-18
Applicant: Seiko Instruments Inc.
Inventor： Kosuke Takada , Atsushi Igarashi
IPC: H03L5/00 , H03L5/02 , H03K3/356 , H03K19/0185
CPC classification number: H03L5/02 , H03K3/356086 , H03K19/018507
Abstract: There is provided a level shift circuit free from malfunction. The level shift circuit converts a signal of a first power supply voltage of a first supply terminal, which is supplied to an input terminal, into a signal of a second power supply voltage of a second supply terminal and outputs the converted signal to an output terminal. The level shift circuit has a control circuit that detects when the first power supply voltage reduces below a predetermined voltage. The voltage of the output terminal of the level shift circuit is fixed to the second power supply voltage or a ground voltage according to a detection signal of the control circuit.
Abstract translation: 提供了一个没有故障的电平转换电路。 电平移位电路将提供给输入端子的第一电源端子的第一电源电压的信号转换为第二电源端子的第二电源电压的信号，并将转换的信号输出到输出端子 。 电平移位电路具有检测第一电源电压何时降低到预定电压以下的控制电路。 电平移位电路的输出端子的电压根据控制电路的检测信号固定在第二电源电压或接地电压上。
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公开(公告)号：US09553514B2
公开(公告)日：2017-01-24
申请号：US14948655
申请日：2015-11-23
Applicant: Seiko Instruments Inc.
Inventor： Hiroyuki Masuko , Kosuke Takada , Michiyasu Deguchi
CPC classification number: H02M3/156 , H02M1/36 , H02M3/158 , H02M3/1588 , H02M2001/0022
Abstract: To provide a DC-DC converter which prevents overshoot from occurring in an output voltage even when a power supply voltage rises from a voltage lower than a desired output voltage of the DC-DC converter to a normal voltage. A DC-DC converter is equipped with a 100% DUTY detection circuit which detects a 100% DUTY state of a PWM comparator, a power supply voltage rise detection circuit which detects a rise in a power supply voltage, and a discharge control circuit which lowers an output voltage of an error amplifier. The DC-DC converter is configured to lower the output voltage of the error amplifier when a power supply voltage rise detection signal is outputted where a 100% DUTY state is reached and the output voltage of the error amplifier is higher than a predetermined voltage.
Abstract translation: 即使当电源电压从低于DC-DC转换器的期望输出电压的电压上升到正常电压时，也能够防止在输出电压中发生过冲的DC-DC转换器。 DC-DC转换器配备有100％DUTY检测电路，其检测PWM比较器的100％DUTY状态，检测电源电压上升的电源电压上升检测电路和降低电源电压的放电控制电路 误差放大器的输出电压。 当输出电源电压上升检测信号达到100％DUTY状态且误差放大器的输出电压高于预定电压时，DC-DC转换器被配置为降低误差放大器的输出电压。
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公开(公告)号：US09293990B2
公开(公告)日：2016-03-22
申请号：US14573837
申请日：2014-12-17
Applicant: Seiko Instruments Inc.
Inventor： Kosuke Takada , Michiyasu Deguchi , Hiroyuki Masuko
CPC classification number: H02M3/156 , H02M2001/0025
Abstract: A switching regulator is provided which can prevent overshooting in an output voltage even when a source voltage is returned to a normal voltage from a voltage lower than a desired output voltage of the switching regulator. The switching regulator includes a 100% duty detector circuit that detects that a PWM comparator is in a 100%-duty state and a discharge accelerator circuit that detects that the output of an error amplifier discharges the voltage of a phase compensating capacitor and that accelerates the discharge, and activates the discharge accelerator circuit when the 100% duty detector circuit detects the 100%-duty state.
Abstract translation: 提供一种开关调节器，其即使当源电压从低于开关调节器的期望输出电压的电压返回到正常电压时也可以防止输出电压中的过冲。 开关调节器包括检测PWM比较器处于100％占空状态的100％占空比检测器电路和检测误差放大器的输出放电相位补偿电容器的电压并且加速相位补偿电容器的放电加速器电路 放电，并且当100％占空比检测器电路检测到100％占空状态时，激活放电加速器电路。
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