Invention Grant
- Patent Title: Integrated pulse shaping biasing circuitry
- Patent Title (中): 集成脉冲整形偏置电路
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Application No.: US14049433Application Date: 2013-10-09
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Publication No.: US09160283B2Publication Date: 2015-10-13
- Inventor: Jinsung Choi , Marcelo Jorge Franco
- Applicant: RF Micro Devices, Inc.
- Applicant Address: US NC Greensboro
- Assignee: RF Micro Devices, Inc.
- Current Assignee: RF Micro Devices, Inc.
- Current Assignee Address: US NC Greensboro
- Agency: Withrow & Terranova, P.L.L.C.
- Main IPC: H01Q11/12
- IPC: H01Q11/12 ; H03F3/19 ; H03F1/02 ; H04B1/034

Abstract:
Integrated pulse shaping biasing circuitry for a radio frequency (RF) power amplifier includes a square wave signal generator and an inverted ramp signal generator. The square wave signal generator and the inverted ramp signal generator are coupled in parallel between an input node and current summation circuitry. The square wave signal generator generates a square wave signal. The inverted ramp signal generator generates an inverted ramp signal. The current summation circuitry receives the generated square wave signal and the inverted ramp signal, and combines the signals to generate a pulse shaped biasing signal for an RF power amplifier. The square wave signal generator, the inverted ramp signal generator, and the current summation circuitry are monolithically integrated on a single semiconductor die.
Public/Granted literature
- US20140306766A1 INTEGRATED PULSE SHAPING BIASING CIRCUITRY Public/Granted day:2014-10-16
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