Invention Grant
- Patent Title: Memory error detection
- Patent Title (中): 内存错误检测
-
Application No.: US14200665Application Date: 2014-03-07
-
Publication No.: US09170894B2Publication Date: 2015-10-27
- Inventor: Ian Shaeffer , Craig E. Hampel
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/16 ; G06F11/07 ; G06F11/10

Abstract:
Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation.
Public/Granted literature
- US20140189466A1 Memory Error Detection Public/Granted day:2014-07-03
Information query