Invention Grant
- Patent Title: Method of manufacturing semiconductor device and semiconductor device
-
Application No.: US14645289Application Date: 2015-03-11
-
Publication No.: US09171814B2Publication Date: 2015-10-27
- Inventor: Masaki Watanabe , Shinji Baba , Muneharu Tokunaga , Toshihiro Iwasaki
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JP2013-061089 20130322
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/00 ; H01L23/31 ; H01L23/498

Abstract:
To improve coupling reliability in flip chip bonding of a semiconductor device. By using, in the fabrication of a semiconductor device, a wiring substrate in which a wiring that crosses an opening area of a solder resist film on the upper surface of the wiring substrate has, on one side of the wiring, a bump electrode and, on the other side, a plurality of wide-width portions having no bump electrode thereon, a solder on the wiring can be dispersed to each of the wide-width portions during reflow treatment in a solder precoating step. Such a configuration makes it possible to reduce a difference in height between the solder on each of terminals and the solder on each of the wide-width portions and to enhance the coupling reliability in flip chip bonding.
Public/Granted literature
- US20150187720A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2015-07-02
Information query
IPC分类: