Invention Grant
US09177614B2 Apparatuses and methods including memory with top and bottom data lines
有权
装置和方法，包括具有顶部和底部数据线的存储器
- Patent Title: Apparatuses and methods including memory with top and bottom data lines
- Patent Title (中): 装置和方法，包括具有顶部和底部数据线的存储器
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Application No.: US14444589Application Date: 2014-07-28
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Publication No.: US09177614B2Publication Date: 2015-11-03
- Inventor: Toru Tanzawa
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C5/02 ; H01L27/115
Abstract:
Some embodiments include apparatuses and methods having a first set of data lines, a second set of data lines, and memory cells located in different levels of the apparatus. In at least one of such embodiments, the memory cells can be arranged in memory cell strings between the first and second set of data lines. Other embodiments including additional apparatuses and methods are described.
Public/Granted literature
- US20140334219A1 APPARATUSES AND METHODS INCLUDING MEMORY WITH TOP AND BOTTOM DATA LINES Public/Granted day:2014-11-13
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