Invention Grant
- Patent Title: Semiconductor stack structure and fabrication method thereof
- Patent Title (中): 半导体堆叠结构及其制造方法
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Application No.: US13727976Application Date: 2012-12-27
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Publication No.: US09177862B2Publication Date: 2015-11-03
- Inventor: Yen-Shih Ho , Hsin Kuan , Long-Sheng Yeou , Tsang-Yu Liu , Chia-Ming Cheng
- Applicant: Xintec Inc.
- Applicant Address: TW Taoyuan
- Assignee: XINTEC INC.
- Current Assignee: XINTEC INC.
- Current Assignee Address: TW Taoyuan
- Agency: Liu & Liu
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/498 ; H01L21/78 ; H01L23/48 ; H01L23/28 ; H01L21/82 ; H01L23/14 ; H01L21/683 ; H01L21/768 ; B81B7/00 ; H01L23/00

Abstract:
A fabrication method of a semiconductor stack structure mainly includes: singulating a wafer of a first specification into a plurality of chips; rearranging the chips into a second specification of a wafer so as to stack the chips on a substrate of the second specification through a plurality of blocks; forming a redistribution layer on the chips; and performing a cutting process to obtain a plurality of semiconductor stack structures. Therefore, the present invention allows a wafer of a new specification to be processed by using conventional equipment without the need of new factory buildings or equipment. As such, chip packages can be timely supplied to meet the replacement speed of electronic products.
Public/Granted literature
- US20130168868A1 SEMICONDUCTOR STACK STRUCTURE AND FABRICATION METHOD THEREOF Public/Granted day:2013-07-04
Information query
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