Invention Grant
- Patent Title: Array substrate and manufacturing method thereof
- Patent Title (中): 阵列基板及其制造方法
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Application No.: US13703112Application Date: 2012-09-26
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Publication No.: US09178046B2Publication Date: 2015-11-03
- Inventor: Ce Ning
- Applicant: BOE TECHNOLOGY GROUP CO., LTD.
- Applicant Address: CN Beijing
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Beijing
- Agency: Ladas & Parry LLP
- Priority: CN201110288858 20110926
- International Application: PCT/CN2012/081997 WO 20120926
- International Announcement: WO2013/044796 WO 20130404
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/66 ; H01L27/12 ; H01L29/786

Abstract:
Embodiment of the present invention disclose an array substrate and a manufacturing method thereof, and the manufacturing method of an array substrate comprises the following steps: Step S1: a gate electrode metal layer, an insulating layer and an active layer are deposited successively on a substrate, and gate electrodes, gate lines and an active layer pattern are formed through a first mask process; Step S2: a protective layer is deposited on the substrate after completion of the step S1, and via-holes are formed in the protective layer through a second mask process; and Step S3: a pixel electrode layer and a source/drain electrode metal layer are deposited sequentially on the substrate after completion of the step S2, and source/drain electrodes, pixel electrodes and data lines are formed through a third mask process.
Public/Granted literature
- US20140054580A1 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF Public/Granted day:2014-02-27
Information query
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