Invention Grant
US09215772B2 Systems and methods for minimizing power dissipation in a low-power lamp coupled to a trailing-edge dimmer
有权
用于最小化耦合到后缘调光器的低功率灯中的功率耗散的系统和方法
- Patent Title: Systems and methods for minimizing power dissipation in a low-power lamp coupled to a trailing-edge dimmer
- Patent Title (中): 用于最小化耦合到后缘调光器的低功率灯中的功率耗散的系统和方法
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Application No.: US14333065Application Date: 2014-07-16
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Publication No.: US09215772B2Publication Date: 2015-12-15
- Inventor: Mohit Sood , Vishwanathan Subramanian
- Applicant: Cirrus Logic, Inc.
- Applicant Address: NL Eindhoven
- Assignee: Philips International B.V.
- Current Assignee: Philips International B.V.
- Current Assignee Address: NL Eindhoven
- Agency: Jackson Walker L.L.P.
- Main IPC: H05B41/14
- IPC: H05B41/14 ; H05B33/08 ; H02M7/04 ; H05B37/02 ; H05B39/04

Abstract:
A controller may predict an estimated occurrence of a high-resistance state of a dimmer, wherein the high-resistance state occurs when the dimmer begins phase-cutting an alternating current voltage signal. The controller may also be configured to operate in a trailing-edge exposure mode for a period of time wherein the period of time includes a time of the estimated occurrence of the high-resistance state in order to allow the controller to detect the occurrence of the high-resistance state, wherein energy is transferred from an input to a dissipative element during the trailing-edge exposure mode. The controller may further be configured to minimize a time between a beginning of the period of time and the estimated occurrence of the high-resistance state by modifying the period of time based on an estimated charging time of a capacitor of the dimmer.
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