Invention Grant
- Patent Title: Multiple depth vias in an integrated circuit
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Application No.: US14614858Application Date: 2015-02-05
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Publication No.: US09230887B2Publication Date: 2016-01-05
- Inventor: Kaiping Liu , Imran Mahmood Khan , Richard Allen Faust
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank D. Cimino
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L23/48 ; H01L21/48 ; H01L23/522 ; H01L23/532 ; H01L21/768 ; H01L23/50 ; H01L49/02
Abstract:
An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.
Public/Granted literature
- US20150170999A1 MULTIPLE DEPTH VIAS IN AN INTEGRATED CIRCUIT Public/Granted day:2015-06-18
Information query
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