Invention Grant
- Patent Title: Loop vectorization methods and apparatus
- Patent Title (中): 环向量化方法和装置
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Application No.: US13630147Application Date: 2012-09-28
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Publication No.: US09244677B2Publication Date: 2016-01-26
- Inventor: Nalini Vasudevan , Jayashankar Bharadwaj , Christopher J. Hughes , Milind B. Girkar , Mark J Charney , Robert Valentine , Victor W. Lee , Daehyun Kim , Albert Hartono , Sara S. Baghsorkhi
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Hanley, Flight & Zimmerman, LLC
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F9/38 ; G06F9/45

Abstract:
Loop vectorization methods and apparatus are disclosed. An example method includes setting a dynamic adjustment value of a vectorization loop; executing the vectorization loop to vectorize a loop by grouping iterations of the loop into one or more vectors; identifying a dependency between iterations of the loop as; and setting the dynamic adjustment value based on the identified dependency.
Public/Granted literature
- US20140096119A1 LOOP VECTORIZATION METHODS AND APPARATUS Public/Granted day:2014-04-03
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