Invention Grant
- Patent Title: System and method for check-node unit message processing
- Patent Title (中): 用于校验节点单元消息处理的系统和方法
-
Application No.: US13667450Application Date: 2012-11-02
-
Publication No.: US09244685B2Publication Date: 2016-01-26
- Inventor: Zongwang Li , Chung-Li Wang , Kaitlyn T. Nguyen , Keklik Bayam Alptekin
- Applicant: LSI Corporation
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Main IPC: H03M13/00
- IPC: H03M13/00 ; G06F9/30

Abstract:
The disclosure is directed to a system and method for storing and processing check-node unit (CNU) messages utilizing random access memory (RAM). A decoder includes a layered array of CNUs configured to receive at least one variable-node unit (VNU) message associated with decoded bits of at least one data segment being operated upon by the decoder. The decoder further includes a CNU message converter configured to permutate at least one initial circulant of the VNU message to generate a converted CNU message having sub-circulants sized for RAM-based processing. The decoder further includes RAM configured to store sub-circulants of the converted CNU message at addressable memory blocks for parallel VNU processing.
Public/Granted literature
- US20140130061A1 System and Method for Check-Node Unit Message Processing Public/Granted day:2014-05-08
Information query
IPC分类: